1. Field of the Invention
The present invention relates to hermetically packaged semiconductor devices and, more particularly, to semiconductor devices including stereolithographically fabricated hermetic packages. The present invention also relates to the use of stereolithography to fabricate hermetic packages on semiconductor device assemblies or on semiconductor dice.
2. Background of Related Art
Semiconductor Device Packages
Solid-state electronic devices, such as semiconductor dice, which are also referred to as semiconductor devices, are typically manufactured on substrates of semiconductor material, such as silicon, germanium, gallium arsenide, or indium phosphide. Circuitry is formed on one surface of a substrate with input and output pads being formed on an active surface of the semiconductor dice of the substrate to facilitate electrical connection with other electronic devices.
Semiconductor devices are often packaged to protect the semiconductor dice from mechanical damage, external contamination, and moisture. Typical types of semiconductor device packages include plastic encapsulated packages, quasi-hermetic cavity type packages, and fully hermetic cavity type packages.
When plastic packages are used, the plastic of the package contacts metal elements of the semiconductor device. Typically, these plastic-metal interfaces do not seal sufficiently to prevent exposure of the die to moisture or to soluble ions. When brought into contact with a semiconductor die, these soluble ions act as electrolytes and, thus, cause corrosive failure of the semiconductor die. In addition, the extensive use of precious metals coupled with base metals in semiconductor dice provides direct current (dc) galvanic potentials for electrochemical corrosion reactions and dendrite growth, thereby affecting the performance and life of the encapsulated semiconductor chip. Thus, while plastic encapsulation of semiconductor devices is the most common form of packaging, semiconductor dice in plastic packages are still vulnerable to electrochemical processes.
As a result of the problems associated with the plastic encapsulation of semiconductor devices, it is sometimes desirable to hermetically package semiconductor dice to prevent external moisture and chemicals from contacting the same. Hermetic packages for semiconductor chips are generally formed from metal or ceramic material. Typically, conventional hermetic packages include a lid or a cap to seal a semiconductor device mounted on a suitable substrate. When a semiconductor device includes a die connected to a lead frame, the leads of the lead frame also need to be hermetically sealed. In metal packages, the individual leads are sealed into the metal platform by separated glass seals. In ceramic packages, the leads extend through the ceramic and are sealed thereby.
Several types of ceramic packages are used to hermetically seal semiconductor chips. Exemplary ceramic hermetic packages include ceramic dual-in-line packages, hard glass packages, side-brazed dual-in-line packages, bottom-brazed or top-brazed chip carriers, pin-grid arrays, or other multilayer ceramic packages. Some of these types of packages are described in U.S. Pat. Nos. 4,769,345, 4,821,151, 4,866,571, 4,967,260, 5,014,159, and 5,323,051. Typically, these packages include a base with a receptacle formed therein to receive a semiconductor device and a lid that is disposable over the receptacle.
In sealing these hermetic packages, the material of one or both of the lid and the base typically must be heated to a temperature that will facilitate sealing of the lid over the receptacle of the base and, thus, hermetic sealing of the semiconductor device within the receptacle. These hermetic packages are, however, somewhat undesirable due to the high temperatures (e.g., at least about 400xc2x0 C. to about 500xc2x0 C.) and lengthy sealing times (e.g., as much as about one or two hours) that are required to obtain a hermetic seal as the lid of a hermetic package is sealed over the receptacle of the hermetic package. Such high temperatures for prolonged periods of time can cause oxidation of the leads of a semiconductor device or cracking of the passivation layer over the active surface of a semiconductor device, both of which can cause the semiconductor device to fail.
Moreover, as conventional hermetic packages are typically fabricated separately from the semiconductor device assembly disposed therein, conventional hermetic packages are relatively bulky and can occupy undesirably large amounts of the real estate on a carrier substrate to which the packaged semiconductor device is connected.
U.S. Pat. No. 5,958,100 (hereinafter xe2x80x9cthe ""100 Patentxe2x80x9d), which is assigned to the assignee of the present invention, discloses a relatively small, substantially hermetic package that is fabricated on semiconductor dice at the wafer stage. The material of the hermetic package, which is referred to as a thermoplastic glass, is a glass with a lower melting temperature than the glass and ceramic materials typically used as hermetic packages. Nonetheless, the packaged semiconductor devices of the ""100 Patent are somewhat bulky. Moreover, despite the lower process temperatures of the materials used to fabricate the hermetic packages of the ""100 Patent, packaging temperatures may be as high as about 350xc2x0 C. As the ""100 Patent teaches a method of molding the hermetic package directly onto a semiconductor device assembly by use of known molding equipment, the semiconductor device may be exposed to these molding temperatures for several minutes, until the thermoplastic glass cools.
Less bulky hermetic packages are disclosed in U.S. Pat. Nos. 5,682,065 and 5,903,044, both of which have been assigned to the assignee of the present invention. Each of these patents discloses a method of fully hermetically packaging semiconductor dice at the wafer scale. Thus, the hermetic package disclosed in these patents takes up much less space than that occupied by conventional hermetic packages. The hermetic package of these patents is somewhat undesirable, however, in that the conventional hermetic packaging materials used to form such a package have very high process temperatures (e.g., up to about 600xc2x0 C.). Thus, the semiconductor dice can be damaged during packaging.
Thus, a hermetic packaging method is needed to fabricate a compact, substantially hermetic package wherein the temperature to which a semiconductor device is exposed during the packaging process is reduced, as is the amount of time the semiconductor device is exposed to the increased temperature.
In the past decade, a manufacturing technique termed xe2x80x9cstereolithographyxe2x80x9d, also known as xe2x80x9clayered manufacturingxe2x80x9d, has evolved to a degree where it is employed in many industries.
Essentially, stereolithography as conventionally practiced involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or xe2x80x9cslicedxe2x80x9d into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and nonmetallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a partially consolidated, fixed, or semisolid state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed, or a separate binder material may be employed to bond material particles to one another and to those of a previously formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, surface resolution is highly dependent upon the minimum surface area of the liquid which can be fixed and the minimum thickness of a layer that can be generated. Of course, in either case, resolution and accuracy of object reproduction from the CAD file is also dependent upon the ability of the apparatus used to fix the material to precisely track the mathematical instructions indicating solid areas and boundaries for each layer of material. Toward that end, and depending upon the layer being fixed, various fixation approaches have been employed, including particle bombardment (electron beams), disposing a binder or other fixative (such as by ink-jet printing techniques), or irradiation using heat or specific wavelength ranges.
An early application of stereolithography was to enable rapid fabrication of molds and prototypes of objects from CAD files. Thus, either male or female forms on which mold material might be disposed might be rapidly generated. Prototypes of objects might be built to verify the accuracy of the CAD file defining the object and to detect any design deficiencies and possible fabrication problems before a design was committed to large-scale production.
In more recent years, stereolithography has been employed to develop and refine object designs in relatively inexpensive materials and has also been used to fabricate small quantities of objects where the cost of conventional fabrication techniques is prohibitive for same, such as in the case of plastic objects conventionally formed by injection molding. It is also known to employ stereolithography in the custom fabrication of products generally built in small quantities or where a product design is rendered only once. Finally, it has been appreciated in some industries that stereolithography provides a capability to fabricate products, such as those including closed interior chambers or convoluted passageways, which cannot be fabricated satisfactorily using conventional manufacturing techniques. It has also been recognized in some industries that a stereolithographic object or component may be formed or built around another, pre-existing object or component to create a larger product.
However, to the inventor""s knowledge, stereolithography has yet to be applied to mass production of articles in volumes of thousands or millions, or employed to produce, augment or enhance products including other, pre-existing components in large quantities, where minute component sizes are involved, and where extremely high resolution and a high degree of reproducibility of results is required. In particular, the inventor is not aware of the use of stereolithography to fabricate substantially hermetic packages for semiconductor devices. Furthermore, conventional stereolithography apparatus and methods fail to address the difficulties of precisely locating and orienting a number of pre-existing components for stereolithographic application of material thereto without the use of mechanical alignment techniques or to otherwise assure precise, repeatable placement of components.
According to one aspect, the present invention includes a packaged semiconductor device. A first embodiment of the packaged semiconductor device includes a semiconductor die operably connected to a carrier substrate and a substantially hermetic package formed over the semiconductor die and in contact with the carrier substrate so as to seal the semiconductor die from the external environment. The semiconductor die may be any type of semiconductor die known in the art and may be connected to the carrier substrate by any type of connection known in the art. The substantially hermetic package includes superimposed, contiguous, mutually adhered layers of a suitable hermetic packaging material, such as a thermoplastic glass.
In another embodiment, the hermetically packaged semiconductor device of the present invention includes a semiconductor die operably connected to a lead frame, the die and portions of the lead frame adjacent thereto being sealed in a substantially hermetic package. Again, the semiconductor die and the lead frame may be of any type known in the art, and the semiconductor die may be connected to the lead frame by any known, suitable method. The substantially hermetic package has a plurality of superimposed, contiguous, mutually adhered layers of a suitable hermetic packaging material, such as a thermoplastic glass.
In yet another embodiment of the packaged semiconductor device of the present invention, a semiconductor die is substantially hermetically packaged at the wafer scale. The hermetic package includes external circuits that communicate with the bond pads of the semiconductor die so as to facilitate connection of the packaged semiconductor device to a higher level substrate or to a lead frame.
Another aspect of the present invention includes the stereolithographic fabrication of a hermetic package over a semiconductor die that is operably connected to a carrier substrate, a lead frame, or another higher level connection element. Preferably, the hermetic package is fabricated by forming layers of unconsolidated hermetic material adjacent to or around the assembly and by consolidating the hermetic material in selected regions adjacent to the semiconductor die or the connection element. Preferably, selective laser sintering (SLS) techniques are employed to fabricate the hermetic package from layers of particulate or powdered hermetic packaging material.
As it is important that packages of the present invention protect the semiconductor dice therein from moisture, accompanying ions, and other potentially damaging factors from the environment external to the semiconductor dice, the substantially hermetic packages of the present invention are preferably manufactured from materials that will adhere and seal to the materials of the semiconductor device so as to prevent potentially damaging factors from contacting same. Accordingly, the stereolithography processes that are preferred for fabricating the substantially hermetic packages of the present invention are capable of fabricating structures from materials that have good hermetic qualities when used with semiconductor devices.
In one such stereolithography process, known as xe2x80x9cselective laser sinteringxe2x80x9d or xe2x80x9cSLSxe2x80x9d, structures are fabricated from layers of powdered or particulate material. The particles in selected regions of each of the layers can be bonded together by use of a laser under the control of a computer. The laser either heats the material particles and sinters adjacent particles together, heats a binder material mixed in with the particles to bond the particles, or heats a binder material with which the material particles are coated to secure adjacent particles in the selected regions of a layer to one another.
Another exemplary stereolithography process that may be used to fabricate substantially hermetic packages incorporating teachings of the present invention is referred to as xe2x80x9claminated object manufacturingxe2x80x9d or xe2x80x9cLOMxe2x80x9d. Laminated object manufacturing involves the use of a laser or other cutting device to define the peripheries of a layer of an object from a sheet of material. Adjacent layers of the object are secured to one another to form the object.
The stereolithographic package fabrication method of the present invention preferably includes the use of a machine vision system to locate the semiconductor device assemblies, individual semiconductor dice, or other substrates over which the substantially hermetic packages are to be fabricated, as well as the features or other components on or associated with the semiconductor device assemblies, dice, or substrates (e.g., bond wires, leads, etc.). The use of a machine vision system directs the alignment of a stereolithography system with each semiconductor device assembly, die, or substrate for material disposition purposes. Accordingly, the semiconductor device assemblies, dice, or other substrates need not be precisely mechanically aligned with any component of the stereolithography system to practice the stereolithographic embodiment of the method of the present invention.
In a preferred embodiment, the substantially hermetic package to be fabricated upon a semiconductor device assembly, die, or other substrate in accordance with the invention is fabricated using precisely focused electromagnetic radiation in the form of a laser under control of a computer and responsive to input from a machine vision system, such as a pattern recognition system, to define each layer of the object to be formed from a layer of material disposed on the semiconductor device assembly, die, or substrate.
Other features and advantages of the present invention will become apparent to those of skill in the art through a consideration of the ensuing description, the accompanying drawings, and the appended claims.